| Authors | Title | Year |
|---|---|---|
| HJ Kim, M Alnemari, N Bagherzadeh | A storage-efficient ensemble classification using filter sharing on binarized convolutional neural networks | 2022 |
| D Sengupta, A Abd El‐Latif, D De… | Reversible quantum communication & systems | 2022 |
| DJ Pagliari, F Schirrmeister… | Guest Editorial: Thematic Section on Applications of Emerging Computing Technologies in Smart Manufacturing and Industry 4.0 | 2022 |
| N Bagherzadeh, O Boyraz | Radiation Characterization of STT-RAM Devices | 2022 |
| MS Kim, AADB Garcia, H Kim… | The effects of approximate multiplication on convolutional neural networks | 2021 |
| JC Blahnik, EH Klaassen, JA Arney, AC Dye… | Fluctuating progress indicator | 2021 |
| SYH Mirmahaleh, M Reshadi, N Bagherzadeh… | Data scheduling and placement in deep learning accelerator | 2021 |
| MC Moghadam, E Masoumi, S Kendale… | Predicting hypotension in the ICU using noninvasive physiological signals | 2021 |
| F Danehdaran, S Angizi… | A combined three and five inputs majority gate-based high performance coplanar full adder in quantum-dot cellular automata | 2021 |
| MS Hosseini, M Ebrahimi, P Yaghini… | Near Volatile and Non-Volatile Memory Processing in 3D Systems | 2021 |
| R Murillo, AADB Garcia, G Botella… | PLAM: a Posit Logarithm-Approximate Multiplier | 2021 |
| MS Hosseini, M Ebrahimi, P Yaghini… | Application Characterization for Near Memory Processing | 2021 |
| MR Taheri, N Shafiee, F Sharifi, MH Moaiyeri… | Energy efficient hybrid full adder design for digital signal processing in nanoelectronics | 2021 |
| P Sadri-Moshkenani, MW Khan, MS Islam… | Optoelectronic Readout of STT-RAM Memory Cells Using Plasmon Drag Effect | 2021 |
| R Murillo, AA Del Barrio, G Botella, MS Kim, HJ Kim… | PLAM: a Posit Logarithm-Approximate Multiplier for Power Efficient Posit-based DNNs | 2021 |
| JK Blahnik, EH Klaassen, JA Arney, AC Dye… | Fluctuating progress indicator | 2021 |
| A Eghbal, PM Yaghini, N Bagherzadeh | Three-dimensional NoC reliability evaluation | 2021 |
| JA Arney, EH Klaassen, JC Blahnik, AC Dye… | Breathing synchronization and monitoring | 2020 |
| MC Moghadam, EMK Abad, N Bagherzadeh… | A machine-learning approach to predicting hypotensive events in ICU settings | 2020 |
| EA Montoya, JR Chen, R Ngelale, HK Lee… | Immunity of nanoscale magnetic tunnel junctions with perpendicular magnetic anisotropy to ionizing radiation | 2020 |
| A Bozorgmehr, MKQ Jooq, MH Moaiyeri, K Navi… | A high-performance fully programmable membership function generator based on 10 nm gate-all-around CNTFETs | 2020 |
| Z Ren, A Alqahtani, N Bagherzadeh… | Thermal TSV optimization and hierarchical floorplanning for 3-D integrated circuits | 2020 |
| SYH Mirmahaleh, M Reshadi… | Flow mapping on mesh-based deep learning accelerator | 2020 |
| P Sadri-Moshkenani, MW Khan… | Effect of magnesium oxide adhesion layer on resonance behavior of plasmonic nanostructures | 2020 |
| M Jasemi, S Hessabi, N Bagherzadeh | Reliable and energy efficient MLC STT-RAM buffer for CNN accelerators | 2020 |
| A Bozorgmehr, MKQ Jooq, MH Moaiyeri, K Navi… | A novel digital fuzzy system for image edge detection based on wrap-gate carbon nanotube transistors | 2020 |
| MC Moghadam, E Masoumi… | Supervised machine-learning algorithms in real-time prediction of hypotensive events | 2020 |
| S Nikbakht Aali, N Bagherzadeh | Divisible load scheduling of image processing applications on the heterogeneous star and tree networks using a new genetic algorithm | 2020 |
| A Tajary, HR Zarandi, N Bagherzadeh | IRHT: An SDC detection and recovery architecture based on value locality of instruction binary codes | 2020 |
| L Alhubail, M Jasemi… | Noc design methodologies for heterogeneous architecture | 2020 |
| M Jasemi, S Hessabi… | Enhancing Reliability of Emerging Memory Technology for Machine Learning Accelerators | 2020 |
| J Talafy, F Zokaee, HR Zarandi… | A High Performance, Multi-Bit Output Logic-in-Memory Adder | 2020 |
| A Albaqsami, MS Hosseini, M Jasemi… | Adaptive HTF-MPR: An Adaptive Heterogeneous TensorFlow Mapper Utilizing Bayesian Optimization and Genetic Algorithms | 2020 |
| S Shahhosseini, A Albaqsami, M Jasemi… | Partition pruning: Parallelization-aware pruning for dense neural networks | 2020 |
| H Zhao, N Bagherzadeh, Q Wang, Y Wang | A Fine-Grained Source-Throttling Method for Mesh Architectures | 2020 |
| A Bozorgmehr, MKQ Jooq, MH Moaiyeri, K Navi… | Communications (AEÜ) | 2020 |
| M Torabzadehkashi, S Rezaei… | Catalina: in-storage processing acceleration for scalable big data analytics | 2019 |
| M Torabzadehkashi, S Rezaei, A HeydariGorji… | Computational storage: an efficient and scalable platform for big data and hpc applications | 2019 |
| S Tabrizchi, MR Taheri, K Navi… | Novel CNFET ternary circuit techniques for high‐performance and energy‐efficient design | 2019 |
| HJ Kim, MS Kim, AA Del Barrio… | A cost-efficient iterative truncated logarithmic multiplication for convolutional neural networks | 2019 |
| SYH Mirmahaleh, M Reshadi, H Shabani… | Flow mapping and data distribution on mesh-based deep learning accelerator | 2019 |
| M Zahmatkesh, S Tabrizchi, S Mohammadyan… | Robust coplanar full adder based on novel inverter in quantum cellular automata | 2019 |
| M Torabzadehkashi, A Heydarigorji… | Accelerating hpc applications using computational storage devices | 2019 |
| M Toulabinejad, MR Taheri, K Navi… | Toward efficient implementation of basic balanced ternary arithmetic operations in CNFET technology | 2019 |
| S Shahhosseini, A Albaqsami, M Jasemi… | Partition pruning: Parallelization-aware pruning for deep neural networks | 2019 |
| LT Oliveira, MS Kim, AADB García, N Bagherzadeh… | Design of Power-Efficient FPGA Convolutional Cores with Approximate Log Multiplier. | 2019 |
| A Mehranzadeh, A Khademzadeh… | DICA: destination intensity and congestion‐aware output selection strategy for network‐on‐chip systems | 2019 |
| M Alnemari, N Bagherzadeh | Efficient deep neural networks for edge computing | 2019 |
| LGG Morales, JEA Cobo, N Bagherzadeh | A new approach to the Population-Based Incremental Learning algorithm using virtual regions for task mapping on NoCs | 2019 |
| L Alhubail, N Bagherzadeh | Power and performance optimal noc design for cpu-gpu architecture using formal models | 2019 |
| P Sadri-Moshkenani, MW Khan, MS Islam, I Krivorotov… | Array of symmetric nanohole dimers with high sensitivity for detection of changes in an STT-RAM ultrathin dielectric layer | 2019 |
| M Soleymani, M Reshadi, N Bagherzadeh… | CLBM: controlled load-balancing mechanism for congestion management in silicon interposer NoC architecture | 2019 |
| P Sadri-Moshkenani, MW Khan, MS Islam… | Array of symmetric nanohole dimers for STT-RAM ultrathin layer sensing | 2019 |
| S Mohammadi, M Jasemi, SMS Talebi… | A radiation hard sense circuit for spin transfer torque random access memory | 2019 |
| P Sadri-Moshkenani, MW Khan… | Effect of Tantalum and MgO adhesion layers on plasmonic nanostructures | 2019 |
| Z Ren, A Alqahtani… | Thermal Analysis of 3D ICs With TSVs Placement Optimization | 2019 |
| A Shahkarami, H Bobarshad, N Bagherzadeh | A stream-sensitive distributed approach for configuring cascaded classifier topologies in real-time large-scale stream mining systems | 2019 |
| MS Kim, AA Del Barrio, LT Oliveira… | Efficient Mitchell's approximate log multipliers for convolutional neural networks | 2018 |
| A Haghighathoseini, H Bobarshad, F Saghafi… | Hospital enterprise architecture framework (study of Iranian university hospital organization) | 2018 |
| MS Kim, AA Del Barrio, R Hermida… | Low-power implementation of Mitchell's approximate logarithmic multiplication for convolutional neural networks | 2018 |
| A Arasteh, MH Moaiyeri, MR Taheri, K Navi… | An energy and area efficient 4: 2 compressor based on FinFETs | 2018 |
| A Charif, A Coelho, M Ebrahimi… | First-last: a cost-effective adaptive routing solution for TSV-based three-dimensional networks-on-chip | 2018 |
| M Torabzadehkashi, S Rezaei, V Alves… | Compstor: An in-storage computation platform for scalable distributed processing | 2018 |
| SN Aali, HS Shahhosseini… | Divisible load scheduling of image processing applications on the heterogeneous star network using a new genetic algorithm | 2018 |
| MO Agyeman, A Ahmadinia, N Bagherzadeh | Energy and performance-aware application mapping for inhomogeneous 3D networks-on-chip | 2018 |
| R Salamat, M Khayambashi, M Ebrahimi… | LEAD: An adaptive 3D-NoC routing algorithm with queuing-theory based analytical verification | 2018 |
| A Alqahtani, Z Ren, J Lee, N Bagherzadeh | System-level analysis of 3D ICs with thermal TSVs | 2018 |
| F Danehdaran, MB Khosroshahy, K Navi… | Design and power analysis of new coplanar one-bit full-adder cell in quantum-dot cellular automata | 2018 |
| A Albaqsami, MS Hosseini… | HTF-MPR: A heterogeneous TensorFlow mapper targeting performance using genetic algorithms and gradient boosting regressors | 2018 |
| AF Noghondar, M Reshadi… | Reducing bypass‐based network‐on‐chip latency using priority mechanism | 2018 |
| F Khodaparast, M Reshadi, N Bagherzadeh | Application partitioning and mapping for bypass channel based NoC | 2018 |
| LGG Morales, JEA Cobo… | Simulation-based evaluation strategy for task mapping approaches in WNoC platforms | 2018 |
| S Angizi, Z He, N Bagherzadeh… | Design and evaluation of a spintronic in-memory processing platform for nonvolatile data encryption | 2017 |
| MB Khosroshahy, MH Moaiyeri, K Navi… | An energy and cost efficient majority-based RAM cell in quantum-dot cellular automata | 2017 |
| MB Khosroshahy, MH Moaiyeri, S Angizi… | Quantum-dot cellular automata circuits with reduced external fixed inputs | 2017 |
| S Tabrizchi, A Panahi, F Sharifi, K Navi… | Method for designing ternary adder cells based on CNFETs | 2017 |
| A Bozorgmehr, MH Moaiyeri, K Navi… | Ultra-efficient fuzzy min/max circuits based on carbon nanotube FETs | 2017 |
| M Berarzadeh, S Mohammadyan, K Navi… | A novel low power Exclusive-OR via cell level-based design function in quantum cellular automata | 2017 |
| H Zhao, N Bagherzadeh, J Wu | A general fault-tolerant minimal routing for mesh architectures | 2017 |
| Z Ghaderi, N Bagherzadeh… | STABLE: Stress-aware boolean matching to mitigate BTI-induced SNM reduction in SRAM-based FPGAs | 2017 |
| RF Mirzaee, MS Daliri, K Navi… | A Single Parity-Check Digit for One Trit Error Detection in Ternary Communication Systems: Gate-Level and Transistor-Level Designs. | 2017 |
| Z Ghaderi, A Alqahtani… | AROMa: aging-aware deadlock-free adaptive routing algorithm and online monitoring in 3D NoCs | 2017 |
| Z Ghaderi, A Alqahtani… | Online monitoring and adaptive routing for aging mitigation in NoCs | 2017 |
| MS Daliri, RF Mirzaee, K Navi, N Bagherzadeh | High-performance ternary operators for scrambling | 2017 |
| M Sam Daliri, K Navi, R Faghih Mirzaee… | A new approach for designing compressors with a new hardware‐friendly mathematical method for multi‐input XOR gates | 2017 |
| Z Rouhani, S Angizi, MR Taheri, K Navi… | Towards approximate computing with quantum-dot cellular automata | 2017 |
| P Sadri-Moshkenani, MW Khan, Q Zhao… | Plasmonic detection of possible defects in multilayer nanohole array consisting of essential materials in simplified STT-RAM cell | 2017 |
| F Verbeek, PM Yaghini, A Eghbal… | A compositional approach for verifying protocols running on on-chip networks | 2017 |
| RD Blanton, B Alizadeh, K Al-Jabery… | Bidmeshki, Mohammad-Mahdi Bild, David Biswas, Santosh Biswas, Satyendra | 2017 |
| R Salamat, M Khayambashi, M Ebrahimi… | A resilient routing algorithm with formal reliability analysis for partially connected 3D-NoCs | 2016 |
| Z Ghaderi, M Ebrahimi, Z Navabi… | SENSIBle: A highly scalable sensor design for path-based age monitoring in FPGAs | 2016 |
| MS Daliri, A Abdoli, K Navi, N Bagherzadeh | A 3D universal structure based on molecular-QCA and CNT technologies | 2016 |
| F Sharifi, MH Moaiyeri, K Navi… | Ultra-low-power carbon nanotube FET-based quaternary logic gates | 2016 |
| R Salamat, M Ebrahimi… | CoBRA: Low cost compensation of TSV failures in 3D-NoC | 2016 |
| F Verbeek, PM Yaghini, A Eghbal… | Deadlock verification of cache coherence protocols and communication fabrics | 2016 |
| F Sharifi, A Panahi, H Sharifi, K Navi… | Design of quaternary 4–2 and 5–2 compressors for nanotechnology | 2016 |
| MH Moaiyeri, N Khastoo, M Nasiri… | An efficient analog-to-digital converter based on carbon nanotube FETs | 2016 |
| Q Zhao, M Rajaei, I Krivorotov, M Nilsson… | Optical investigation of radiation induced conductivity changes in STT-RAM cells | 2016 |
| BM Lowenthal, X Liao, F Wen… | Discontinuous unilateral involvement of 12 part core biopsies by adenocarcinoma predicts bilateral involvement of subsequent radical prostatectomy | 2016 |
| F Verbeek, PM Yaghini, A Eghbal… | ADVOCAT: Automated deadlock verification for on-chip cache coherence and interconnects | 2016 |
| MS Daliri, RF Mirzaee, K Navi, N Bagherzadeh | Ternary cyclic redundancy check by a new hardware-friendly ternary operator | 2016 |
| R Faghih Mirzaee, M Jasemi, A Valizadeh… | On the design of fully symmetrical bridge-style circuits | 2016 |
| H Sarbazi-Azad, N Bagherzadeh, M Ebrahimi… | Introduction to the Special Section on On-chip parallel and network-based systems | 2016 |
| S Angizi, MH Moaiyeri, S Farrokhi, K Navi… | Designing quantum-dot cellular automata counters with energy consumption analysis | 2015 |
| A Eghbal, PM Yaghini, N Bagherzadeh… | Analytical fault tolerance assessment and metrics for TSV-based 3D network-on-chip | 2015 |
| F Sharifi, MH Moaiyeri, K Navi, N Bagherzadeh | Robust and energy-efficient carbon nanotube FET-based MVL gates: A novel design approach | 2015 |
| F Sharifi, MH Moaiyeri, K Navi… | Quaternary full adder cells based on carbon nanotube FETs | 2015 |
| MO Agyeman, A Ahmadinia… | Performance and energy aware inhomogeneous 3d networks-on-chip architecture generation | 2015 |
| S Angizi, S Sayedsalehi, A Roohi… | Design and verification of new n-bit quantum-dot synchronous counters using majority function-based JK flip-flops | 2015 |
| H Shabani, A Roohi, A Reza, M Reshadi… | Loss-aware switch design and non-blocking detection algorithm for intra-chip scale photonic interconnection networks | 2015 |
| PM Yaghini, A Eghbal, SS Yazdi… | Capacitive and inductive tsv-to-tsv resilient approaches for 3d ics | 2015 |
| M Khayambashi, PM Yaghini, A Eghbal… | Analytical reliability analysis of 3D NoC under TSV failure | 2015 |
| R Salamat, M Ebrahimi… | An adaptive, low restrictive and fault resilient routing algorithm for 3d network-on-chip | 2015 |
| S Angizi, F Danehdaran, S Sarmadi… | An ultra-high speed and low complexity quantum-dot cellular automata full adder | 2015 |
| PM Yaghini, A Eghbal, N Bagherzadeh | On the design of hybrid routing mechanism for mesh-based network-on-chip | 2015 |
| M Jasemi, R Faghih Mirzaee, K Navi… | Voltage mirror circuit by carbon nanotube field effect transistors for mirroring dynamic random access memories in multiple‐valued logic and fuzzy logic | 2015 |
| A Eghbal, PM Yaghini… | Capacitive coupling mitigation for tsv-based 3d ics | 2015 |
| PM Yaghini, A Eghbal, SS Yazdi… | Accurate system-level TSV-to-TSV capacitive coupling fault model for 3D-NoC | 2015 |
| PM Yaghini, A Eghbal, M Khayambashi… | Coupling mitigation in 3-d multiple-stacked devices | 2015 |
| A Demiriz, N Bagherzadeh, A Alhussein | Using constraint programming for the design of network-on-chip architectures | 2015 |
| H Sarbazi-Azad, N Bagherzadeh… | Advances in multicore systems architectures | 2015 |
| M Ebrahimi, R Salamat, N Bagherzadeh… | A Fault Resilient Routing Algorithm for Sparsely Connected 3D NoCs | 2015 |
| M Daneshtalab, N Bagherzadeh, H Sarbazi-Azad | Special issue on on-chip parallel and network-based systems | 2015 |
| H Karkhaneh, JM Liu, A Ghorbani… | Fiber dispersion effects in injection-locked optical OFDM systems | 2015 |
| N POUNAKI, MH MOAIYERI, K NAVI… | An Ultra-efficient Imprecise Adder for Approximate Computing Based on CNTFET | 2015 |
| M Daneshtalab, N Bagherzadeh… | On-chip parallel and network-based systems | 2015 |
| S Angizi, E Alkaldy, N Bagherzadeh… | Novel robust single layer wire crossing approach for exclusive or sum of products logic design with quantum-dot cellular automata | 2014 |
| R Faghih Mirzaee, K Navi, N Bagherzadeh | High-efficient circuits for ternary addition | 2014 |
| C Wang, N Bagherzadeh | Design and evaluation of a high throughput qos-aware and congestion-aware router architecture for network-on-chip | 2014 |
| AA Del Barrio, N Bagherzadeh, R Hermida | Ultra-low-power adder stage design for exascale floating point units | 2014 |
| A Eghbal, PM Yaghini, SS Yazdi… | Tsv-to-tsv inductive coupling-aware coding scheme for 3d network-on-chip | 2014 |
| A Demiriz, N Bagherzadeh, O Ozturk | Voltage island based heterogeneous NoC design through constraint programming | 2014 |
| PM Yaghini, A Eghbal, N Bagherzadeh | A gals router for asynchronous network-on-chip | 2014 |
| F Hosseinzadeh, N Bagherzadeh… | Fault-tolerant optimization for application-specific network-on-chip architecture | 2014 |
| C Wang, WH Hu, N Bagherzadeh | Scalable load balancing congestion-aware Network-on-Chip router architecture | 2013 |
| F Bolanos, F Rivera, JE Aedo… | From UML specifications to mapping and scheduling of tasks into a NoC, with reliability considerations | 2013 |
| A Alhussien, F Verbeek, B van Gastel… | Fully reliable dynamic routing logic for a fault-tolerant NoC architecture | 2013 |
| X Wang, M Yang, Y Jiang, M Palesi, P Liu, T Mak… | Efficient multicast schemes for 3-D Networks-on-Chip | 2013 |
| A Demiriz, N Bagherzadeh… | Cpnoc: On using constraint programming in design of network-on-chip architecture | 2013 |
| S Azampanah, A Khademzadeh… | Contention‐aware selection strategy for application‐specific network‐on‐chip | 2013 |
| A Demiriz, N Bagherzadeh | On heterogeneous network-on-chip design based on constraint programming | 2013 |
| A Eskandari, A Khademzadeh… | Quality of service optimization for network-on-chip using bandwidth-constraint mapping algorithm | 2013 |
| X Wang, M Yang, Y Jiang, M Palesi, P Liu, T Mak… | Efficient Multicasting Schemes for 3-D Networks-on-Chip | 2013 |
| H Sarbazi-Azad, N Bagherzadeh | Foreword: Multicore computing systems: Architecture, programming tools, and applications | 2013 |
| WH Hu, C Wang, N Bagherzadeh | Design and analysis of a mesh-based wireless network-on-chip | 2012 |
| C Wang, WH Hu, N Bagherzadeh | A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms | 2012 |
| A Alhussien, C Wang, N Bagherzadeh | Design and evaluation of a high throughput robust router for network-on-chip | 2012 |
| F Bolanos, JE Aedo, F Rivera, N Bagherzadeh | Mapping and Scheduling in Heterogeneous NoC through Population-Based Incremental Learning. | 2012 |
| A Alhussien, N Bagherzadeh, F Verbeek… | A formally verified deadlock-free routing function in a fault-tolerant NoC architecture | 2012 |
| S Azampanah, A Khademzadeh… | LATEX: New selection policy for adaptive routing in application-specific NoC | 2012 |
| A Hatanaka, N Bagherzadeh | A software pipelining algorithm of streaming applications with low buffer requirements | 2012 |
| WH Hu, CY Chen, JH Bahn, N Bagherzadeh | Parallel low-density parity check decoding on a network-on-chip-based multiprocessor platform | 2012 |
| F Hosseinzadeh, N Bagherzadeh… | Improving reliability in application-specific 3d network-on-chip | 2012 |
| N Bagherzadeh… | High-Performance Computing System Architectures: Design and Performance | 2012 |
| C Wang, N Bagherzadeh | High-throughput differentiated service provision router architecture for wireless network-on-chip | 2012 |
| T Aamodt, IM Ababneh, J Abawajy, H Abbes… | End of Volume Reviewer Index | 2012 |
| JE Aedo Cobo, FA Rivera Vélez, N Bagherzadeh | Mapping and Scheduling in Heterogeneous NoC through Population-Based Incremental Learning | 2012 |
| H Sarbazi-Azad, N Bagherzadeh | Editorial notes: Special issue on on-chip parallel and network-based systems | 2012 |
| C Wang, WH Hu, N Bagherzadeh | A wireless network-on-chip design for multicore platforms | 2011 |
| C Wang, WH Hu, SE Lee, N Bagherzadeh | Area and power-efficient innovative congestion-aware Network-on-Chip architecture | 2011 |
| J Yang, C Chun, N Bagherzadeh… | Load balancing for data-parallel applications on network-on-chip enabled multi-processor platform | 2011 |
| A Hatanaka, N Bagherzadeh | A scheduling approach for distributed resource architectures with scarce communication resources | 2011 |
| HH Abdullah, HA Elsadek, H Eldeeb… | High Performance Grid Computation of the Scattered Field Formulation for Nth Order Debye Modeling of the General Dispersive Media | 2011 |
| IM Ababneh, J Abawajy, H Abdallah, W Abd-Almageed… | End of Volume Reviewer Index | 2011 |
| N Bagherzadeh, H Sarbazi-Azad | Special issue on: On-chip parallel and network-based systems | 2011 |
| C Wang, WH Hu, N Bagherzadeh | Congestion-aware Network-on-Chip router architecture | 2010 |
| A Alhussien, C Wang… | A scalable delay insensitive asynchronous NoC with adaptive routing | 2010 |
| F Penczek, S Herhut, SB Scholz… | Message driven programming with s-net: methodology and performance | 2010 |
| C Wang, WH Hu, SE Lee… | Area and power-efficient innovative network-on-chip architecurte | 2010 |
| H Eldeeb, H Elsadek, M Dessokey… | High performance parallel computing for FDTD numerical technique in electromagnetic calculations for SAR distribution inside human head | 2010 |
| J Yang, SE Lee, C Chen… | Ray tracing on a networked processor array | 2010 |
| YS Yang, JH Bahn, SE Lee, J Yang… | Parallel processing for block ciphers on a fault tolerant networked processor array | 2010 |
| SE Lee, N Bagherzadeh | A variable frequency link for a power-aware network-on-chip (NoC) | 2009 |
| JH Bahn, JS Yang, WH Hu… | Parallel FFT algorithms on network-on-chips | 2009 |
| SE Lee, N Bagherzadeh | A high level power model for Network-on-Chip (NoC) router | 2009 |
| YS Yang, JH Bahn, SE Lee… | Parallel and pipeline processing for block cipher algorithms on a network-on-chip | 2009 |
| J Huseynov, S Baliga, M Dillencourt… | Gas-leak localization using distributed ultrasonic sensors | 2009 |
| F Bagci, F Kluge, T Ungerer, N Bagherzadeh | Optimisations for LocSens-an indoor location tracking system using wireless sensors. | 2009 |
| WH Hu, JH Bahn… | Parallel LDPC decoding on a network-on-chip based multiprocessor platform | 2009 |
| R Guha, N Bagherzadeh, P Chou | Resource management and task partitioning and scheduling on a run-time reconfigurable embedded system | 2009 |
| F Bagci, T Ungerer… | SecSens-Security architecture for wireless sensor networks | 2009 |
| F Bagci, J Wolf, T Ungerer, N Bagherzadeh | Mobile Agents for Wireless Sensor Networks. | 2009 |
| F Bagci, T Ungerer, N Bagherzadeh | Multi-level security in wireless sensor networks | 2009 |
| SE Lee, C Wilkerson, M Zhang… | Low power adaptive pipeline based on instruction isolation | 2009 |
| HH Abdullah, JY Yang, N Bagherzadeh… | Parallel electric field integral equation solver for arbitrary shaped conducting bodies | 2009 |
| WH Hu, CY Chen… | A Spectral-based partitioning algorithm for parallel LDPC decoding on a multiprocessor platform | 2009 |
| A Hatanaka, N Bagherzadeh | Scheduling techniques for multi-core architectures | 2009 |
| M Sanchez-Elez, N Bagherzadeh, R Hermida | A framework for low energy data management in reconfigurable multi-context architectures | 2009 |
| F Bagci, T Ungerer, N Bagherzadeh | Secsens-security architecture forwireless sensor networks | 2009 |
| SE Lee, N Bagherzadeh | Energy and Power Issues in Networks-on-Chips | 2009 |
| WH Hu, SE Lee, N Bagherzadeh | DMesh: a diagonally-linked mesh network-on-chip architecture | 2008 |
| JH Bahn, N Bagherzadeh | A generic traffic model for on-chip interconnection networks | 2008 |
| SE Lee, JH Bahn, YS Yang, N Bagherzadeh | A generic network interface architecture for a networked processor array (NePA) | 2008 |
| JH Bahn, SE Lee, YS Yang, J Yang… | On design and application mapping of a Network-on-Chip (NoC) architecture | 2008 |
| W Trumler, S Schlingmann, T Ungerer, JH Bahn… | Self-optimized Routing in a Network on-a-Chip | 2008 |
| A Niktash, HT Parizi, AH Kamalizad… | Recfec: A reconfigurable fec processor for viterbi, turbo, reed-solomon and ldpc coding | 2008 |
| F Bagci, F Kluge, N Bagherzadeh… | LocSens-An Indoor Location Tracking System using Wireless Sensors | 2008 |
| JH Bahn, N Bagherzadeh | Design of simulation and analytical models for a 2D-meshed asymmetric adaptive router | 2008 |
| JH Bahn, N Bagherzadeh | Efficient parallel buffer structure and its management scheme for a robust network-on-chip (noc) architecture | 2008 |
| N Bagherzadeh, M Matsuura | Performance impact of task-to-task communication protocol in network-on-chip | 2008 |
| F Bagci, T Ungerer, N Bagherzadeh | ESTR-Energy Saving Token Ring Protocol for Wireless Sensor Networks. | 2008 |
| S Lee, N Bagherzadeh | NePA: networked processor array for high performance computing | 2008 |
| N Tabrizi, N Bagherzadeh | An ASIC design and formal analysis of a novel pipelined and parallel sorting accelerator | 2008 |
| F Rivera, M Sanchez-Elez, R Hermida… | Scheduling methodology for conditional execution of kernels onto multicontext reconfigurable architectures | 2008 |
| H Elsadek, H Eldeeb, H Abdallah, M Eldesouky… | Specific Absorption Rate Calculation using Parallel 3D Finite Difference Time Domain Technique. | 2008 |
| JH Bahn, N Bagherzadeh | Efficient Parallel Buffer Structure and Its Management Scheme for a Robust Network-on-Chip (NoC) Architecture | 2008 |
| A Hatanaka, N Bagherzadeh | A modulo scheduling algorithm for a coarse-grain reconfigurable array template | 2007 |
| JH Bahn, SE Lee… | On design and analysis of a feasible network-on-chip (noc) architecture | 2007 |
| JH Bahn, SE Lee, N Bagherzadeh | Design of a router for network-on-chip | 2007 |
| SE Lee, JH Bahn… | Design of a feasible on-chip interconnection network for a chip multiprocessor (cmp) | 2007 |
| B Gorjiara, N Bagherzadeh, PH Chou | Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling | 2007 |
| A Niktash, HT Parizi… | Application of a heterogeneous reconfigurable architecture to OFDM wireless systems | 2007 |
| R Guha, N Bagherzadeh, P Chou | An efficient placement algorithm for run-time reconfigurable embedded system | 2007 |
| H Eldeeb, H Elsadek, H Abdallah… | FDTD ACCELERATOR FOR CALCULATING SAR DISTRIBUTION INDSIE HUMAN HEAD DUE TO RADIATION FROM WORELESS DEVICES | 2007 |
| A Niktash, HT Parizi, N Bagherzadeh | A reconfigurable processor for forward error correction | 2007 |
| A Niktash, H Parizi… | A Study of Implementation of IEEE 802.11 a Physical Layer on a Heterogeneous Reconf1gurable Platform | 2007 |
| R Guha, N Bagherzadeh | An efficient partitioning and scheduling algorithm for streaming applications on FPGA with resource constraint | 2007 |
| B Gorjiara, N Bagherzadeh… | Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost | 2007 |
| M Marchese, M Weeks, P Kitsos, N Bagherzadeh… | The following list honors and recognizes those individuals who provided or delegated reviews for the papers appearing in Volume 32, Numbers 1–6 of the … | 2007 |
| M Sanchez-Elez, M Fernandez, N Bagherzadeh… | A Coarse-Grain Dynamically Reconfigurable System and Compilation Framework | 2007 |
| F Rivera, M Sanchez-Elez, N Bagherzadeh | Configuration and Data Scheduling for Executing Dynamic Applications onto Multi-Context Reconfigurable Architectures. | 2007 |
| SE Lee, N Bagherzadeh | Increasing the throughput of an adaptive router in network-on-chip (NoC) | 2006 |
| H Parizi, A Niktash, A Kamalizad… | A reconfigurable architecture for wireless communication systems | 2006 |
| J Davila, A de Torres, JM Sanchez… | Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys) | 2006 |
| A Niktash, HT Parizi… | A multi-standard Viterbi decoder for mobile applications using a reconfigurable architecture | 2006 |
| F Rivera, M Sanchez-Elez, M Fernández… | Configuration scheduling for conditional branch execution onto multi-context reconfigurable architectures | 2006 |
| N Tabrizi, N Bagherzadeh | A Distributed and Shared Register File for a Multiprocessor-on-Chip to Support Real-Time Applications | 2006 |
| N Tabrizi, N Bagherzadeh | A Parallel Sort Engine with Dynamic Memory for a Multiprocessor-on-a-Chip | 2006 |
| SE Lee, N Bagherzadeh | Increasing the Throughput of an Adaptive Router in | 2006 |
| N Tabrizi, N Bagherzadeh | An ASIC design of a novel pipelined and parallel sorting accelerator for a multiprocessor-on-a-chip | 2005 |
| A Niktash, R Maestre… | A case study of performing OFDM kernels on a novel reconfigurable DSP architecture | 2005 |
| A Kamalizad, N Tabrizi, N Bagherzadeh… | A programmable DSP architecture for wireless communication systems | 2005 |
| MC Villa-Uriol, F Kuester, N Bagherzadeh… | Hierarchical kinematic synthesis of motion for avatars creation | 2005 |
| F Rivera, M Sanchez-Elez, M Fernández… | Low power data prefetch for 3D image applications on coarse-grain reconfigurable architectures | 2005 |
| N Bagherzadeh, T Eichenberg | Mobile software defined radio solution using high-performance, low-power reconfigurable DSP architecture | 2005 |
| B Gorji-Ara, P Chou, N Bagherzadeh… | Fast and efficient voltage scheduling by evolutionary slack distribution | 2004 |
| B Gorjiara, N Bagherzadeh, P Chou | An efficient voltage scaling algorithm for complex socs with few number of voltage modes | 2004 |
| N Tabrizi, N Bagherzadeh, AH Kamalizad… | Mars: A macro-pipelined reconfigurable system | 2004 |
| MC Villa-Uriol, G Chaudhary, F Kuester… | Extracting 3D from 2D: selection basis for camera calibration | 2004 |
| F Rivera, M Sanchez-Elez, M Fernández… | Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures | 2004 |
| MC Villa-Uriol, F Kuester, N Bagherzadeh… | Kinematic synthesis of avatar skeletons from visual data | 2004 |
| J Hahn, D Li, Q Xie, PH Chou… | Power reduction in JTRS radios with ImpacctPro | 2004 |
| A Kamalizad, R Plettner, C Pan… | Fast parallel soft Viterbi decoder mapping on a reconfigurable DSP platform | 2004 |
| N Bagherzadeh | Computational models | 2004 |
| B Gorjiara, N Bagherzadeh | Systematic Power Management of Heterogeneous Real-time Systems by Dynamic Schedule Analysis | 2004 |
| M Fernández, MSE Martín, RH Correa… | Ejecución paralela de árboles jerárquicos en arquitecturas reconfigurables de grano grueso | 2004 |
| H Du, M Sanchez-Elez, N Tabrizi… | Interactive ray tracing on reconfigurable SIMD MorphoSys | 2003 |
| AH Kamalizad, C Pan… | Fast parallel FFT on a reconfigurable computation platform | 2003 |
| G Venkataramani, W Najjar, F Kurdahi… | Automatic compilation to a coarse-grained reconfigurable system-opn-chip | 2003 |
| M Sanchez-Elez, H Du, N Tabrizi, Y Long… | Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture | 2003 |
| C Pan, N Bagherzadeh, AH Kamalizad… | Design and analysis of a programmable single-chip architecture for DVB-T base-band receiver | 2003 |
| MC Villa-Uriol, M Sainz, F Kuester… | Automatic creation of three-dimensional avatars | 2003 |
| A Koohi, N Bagherzadeh, C Pan | A fast parallel Reed-Solomon decoder on a reconfigurable architecture | 2003 |
| M Sainz, A Susin… | Camera calibration of long image sequences with the presence of occlusions | 2003 |
| M Sanchez-Elez, M Fernández, M Anido… | Low energy data management for different on-chip memory levels in multi-context reconfigurable architectures | 2003 |
| D Li, PH Chou, N Bagherzadeh | Topology selection for energy minimization in embedded networks | 2003 |
| J Liu, PH Chou, N Bagherzadeh | Energy Optimization of Distributed Pipelined Processors by Combined Data Compression and Functional Partitioning | 2003 |
| R Reuss, J Munoz, T Miyazaki… | Adaptive computing: what can it do, where can it go? | 2003 |
| C Albrecht, AB Kahng, I Mandoiu, A Zelikovsky, D Li… | ASP-DAC 2002/VLSI 2002 Best Papers | 2003 |
| A Paar, H Du, N Bagherzadeh | A Component Oriented Simulator for HW/SW Co-Designs. | 2003 |
| M Sainz, A Susín, A Cervantes… | Persepolis: Recovering history with a handheld camera. | 2003 |
| B Gorjiara, P Chou, N Bagherzadeh | An Algorithm to Avoid Power Command Jitter in Middleware-Based Distributed Embedded Systems | 2003 |
| EM Aboulhamid, G Agrawal, A Akkas… | 2002 reviewers list | 2003 |
| P Chou, N Bagherzadeh | Integrated Management of Power Aware Computation and Communication (IMPACCT) | 2003 |
| N Bagherzadeh, C Pan | On a Reconfigurable Architecture | 2003 |
| D Li, PH Chou, N Bagherzadeh | Mode selection and mode-dependency modeling for power-aware embedded systems | 2002 |
| ML Anido, A Paar… | Improving the operation autonomy of SIMD processing elements by using guarded instructions and pseudo branches | 2002 |
| J Liu, PH Chou, N Bagherzadeh | Communication speed selection for embedded systems with networked voltage-scalable processors | 2002 |
| PH Chou, J Liu, D Li, N Bagherzadeh | Impacct: Methodology and tools for power-aware embedded systems | 2002 |
| M Sainz, N Bagherzadeh… | Recovering 3D metric structure and motion from multiple uncalibrated cameras | 2002 |
| M Sanchez-Elez, M Fernández… | A complete data scheduler for multi-context reconfigurable architectures | 2002 |
| H Parizi, A Niktash, N Bagherzadeh… | MorphoSys: A coarse grain reconfigurable architecture for multimedia applications | 2002 |
| MSN Bagherzadeh, A Susin | Hardware accelerated voxel carving | 2002 |
| A Paar, ML Anido, N Bagherzadeh | A novel predication scheme for a SIMD system-on-chip | 2002 |
| J Liu, PH Chou, N Bagherzadeh | Power-aware task motion for enhancing dynamic range of embedded systems with renewable energy sources | 2002 |
| J Liu, PH Chou, N Bagherzadeh | Combined functional partitioning and communication speed selection for networked voltage-scalable processors | 2002 |
| R Maestre, FJ Kurdahi, M Fernández… | A framework for reconfigurable computing: Task scheduling and context management-a summary | 2002 |
| S Latifi, SQ Zheng… | Hamiltonian path and cycle in hypercubes with faulty links | 2002 |
| J Liu, PH Chou, N Bagherzadeh | Communication Speed Selection and Functional Partitioning for Low-Energy On-Chip Networked Multiprocessor | 2002 |
| ML Anido, A Paar… | A novel method for improving the operation autonomy of SIMD processing elements | 2002 |
| N Bagherzadeh | MorphoSys Project | 2002 |
| C ZHANG, N BAGHERZADEH | STRIP-BASED JPEG 2000 WAVELET TRANSFORM USING MORPHOSYS | 2002 |
| J Liu, PH Chou, N Bagherzadeh | for Networked Voltage-Scalable Processors· | 2002 |
| R Maestre, FJ Kurdahi, M Frenandez… | VLSI transactions best paper award" A framework for reconfigurable computing: task scheduling and context management" | 2002 |
| J Liu, PH Chou, N Bagherzadeh… | Power-aware scheduling under timing constraints for mission-critical embedded systems | 2001 |
| R Maestre, FJ Kurdahi, M Fernández… | A framework for reconfigurable computing: Task scheduling and context management | 2001 |
| G Venkataramani, W Najjar, F Kurdahi… | A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture | 2001 |
| J Liu, PH Chou, N Bagherzadeh… | A constraint-based application model and scheduling techniques for power-aware systems | 2001 |
| R Maestre, F Kurdahi, M Fernandez, R Hermida… | Kernel scheduling techniques for efficient solution space exploration in reconfigurable computing | 2001 |
| R Maestre, F Kurdahl, M Fernandez… | A formal approach to context scheduling for multicontext reconfigurable architectures | 2001 |
| M Sanchez-Elez, M Fernández, R Hermida… | A data scheduler for multi-context reconfigurable architectures | 2001 |
| J Liu, PH Chou, N Bagherzadeh… | Power-aware task motion: Dynamic range enhancement for power-aware embedded systems | 2001 |
| M Ahamed, H Eldeeb, S Nassar… | Design and implementation of Automatic Parallel Detection Layer | 2001 |
| F Kurdahi, N Bagherzadeh… | A Data Scheduler for Multi-Context Reconfigurable | 2001 |
| H Singh, MH Lee, G Lu, FJ Kurdahi… | MorphoSys: an integrated reconfigurable system for data-parallel and computation-intensive applications | 2000 |
| MH Lee, H Singh, G Lu, N Bagherzadeh… | Design and implementation of the MorphoSys reconfigurable computing processor | 2000 |
| H Singh, G Lu, E Filho, R Maestre, MH Lee… | MorphoSys: case study of a reconfigurable computing system targeting multimedia applications | 2000 |
| R Maestre, M Fernandez, FJ Kurdahi… | Configuration management in multi-context reconfigurable systems for simultaneous performance and power optimizations | 2000 |
| FJ Kurdahi, N Bagherzadeh, P Athanas… | Guest editors' introduction: Configurable computing | 2000 |
| R Maestre, FJ Kurdahi, M Femandez… | Optimal vs. heuristic approaches to context scheduling for multi-context reconfigurable architectures | 2000 |
| G Lu, H Singh, MH Lee, N Bagherzadeh… | The MorphoSys parallel reconfigurable system | 1999 |
| R Maestre, FJ Kurdahi, N Bagherzadeh… | Kernel scheduling in reconfigurable computing | 1999 |
| G Lu, H Singh, MH Lee, N Bagherzadeh… | The MorphoSys dynamically reconfigurable system-on-chip | 1999 |
| R Maestre, M Fernández, R Hermida… | A framework for scheduling and context allocation in reconfigurable computing | 1999 |
| G Lu, M Lee, H Singh, N Bagherzadeh… | MorphoSys: a reconfigurable processor targeted to high performance image application | 1999 |
| M Pontius, N Bagherzadeh | Multithreaded extensions enhance multimedia performance | 1999 |
| A Agrawala, R Aitken, SG Akl, D Akopian… | 1998 Reviewers List | 1999 |
| H Singh, MH Lee, G Lu, FJ Kurdahi… | MorphoSys: A reconfigurable architecture for multimedia applications | 1998 |
| H Singh, MH Lee, G Lu, FJ Kurdahi… | MorphoSys: An integrated re-configurable architecture | 1998 |
| S Wallace, N Bagherzadeh | Modeled and measured instruction fetching performance for superscalar microprocessors | 1998 |
| MM de Azevedo, N Bagherzadeh… | Low expansion packings and embeddings of hypercubes into star graphs: A performance-oriented approach | 1998 |
| S Wallace, N Bagherzadeh | A scalable register file architecture for superscalar processors | 1998 |
| S Shoari, N Bagherzadeh, D Goodman, TE Milner… | A parallel algorithm for pulsed laser infrared tomography | 1998 |
| N Bagherzadeh, M Dowd, S Latifi | Faster column operations in star networks | 1998 |
| N Bagherzadeh, FJ Kurdahi | Morphosys: A Reconfigurable Architecture | 1998 |
| H Singh, MH Lee, G Lu, FJ Kurdahi, N Bagherzadeh… | MorphoSys: An Integrated Reconfigurable System for Data-Parallel Computation-Intensive Applications.” sbcci | 1998 |
| S Wallace, N Bagherzadeh | Multiple branch and block prediction | 1997 |
| S Latifi, N Bagherzadeh, RR Gajjala | Fault-tolerant embedding of linear arrays and rings in the star graph | 1997 |
| S Latifi, N Bagherzadeh | On embedding rings into a star-related network | 1997 |
| S Wallace, N Bagherzadeh | Department of Electrical and Computer Engineering University of California, Irvine Irvine, CA 92697 swallace@ ece. uci. edu, nader@ ece. uci. edu | 1997 |
| S Wallace, N Bagherzadeh | Dept. of Electrical and Computer Engineering | 1997 |
| S Wallace, N Bagherzadeh | A scalable register file architecture for dynamically scheduled processors | 1996 |
| M Gulati, N Bagherzadeh | Performance study of a multithreaded superscalar microprocessor | 1996 |
| N Bagherzadeh, M Dowd… | Embedding an arbitrary binary tree into the star graph | 1996 |
| M Loikkanen, N Bagherzadeh | A fine-grain multithreading superscalar architecture | 1996 |
| S Wallace, N Bagherzadeh | Instruction fetching mechanisms for superscalar microprocessors | 1996 |
| MM De Azevedo, S Latift… | Low expansion packings and embeddings of hypercubes into star graphs | 1996 |
| N Nassif, N Bagherzadeh | A grid embedding into the star graph for image analysis solutions | 1996 |
| MM De Azevedo, N Bagherzadeh, M Dowd… | Some topological properties of star connected cycles | 1996 |
| MM Azevedo, N Bagherzadeh, S Latifi | Variable-dilation embeddings of hypercubes into star graphs: performance metrics, mapping functions, and routing | 1996 |
| MM De Azevedo, N Bagherzadeh… | Average distance and routing algorithms in the star-connected cycles interconnection network | 1996 |
| N Bagherzadeh, M Dowd | Problems on routing bounded distance assignments in hypercubes | 1996 |
| F Etemadi, HK Liu, N Bagherzadeh, FJ Kurdahi | Shaping Filter Design for a 155Mbps 64-CAP ATM Transceiver | 1996 |
| M Moraes de Azevedo, N Bagherzadeh… | Average Distance and Routing Algorithms in the Star-Connected Cycles Interconnection Network | 1996 |
| A Fijany, GL Kwan, N Bagherzadeh | Fast Parallel Computation Of Multibody Dynamics | 1996 |
| P Agathoklis, PE Allen, N Bagherzadeh, N Bile110… | Mohan Kumar Curtin University | 1996 |
| S Latifi, N Bagherzadeh | On clustered-star graph and its properties | 1996 |
| N Bagherzadeh, M Dowd, S Latifi | A well-behaved enumeration of star graphs | 1995 |
| S Wallace, N Bagherzadeh | Performance issues of a superscalar microprocessor | 1995 |
| A Abnous, N Bagherzadeh | Architectural design and analysis of a VLIW processor | 1995 |
| MM Deazevedo, N Bagherzadeh, S Latifi | Broadcasting algorithms for the star-connected cycles interconnection network | 1995 |
| N Bagherzadeh, M Dowd | Computation in faulty stars [hypercube networks] | 1995 |
| MM Azevedo, N Bagherzadeh… | Fault-diameter of the star-connected cycles interconnection network | 1995 |
| S Wallace, N Dagli… | Design and implementation of a 100 MHz centralized instruction window for a superscalar microprocessor | 1995 |
| S Latifi, MM de Azevedo, N Bagherzadeh | A star-based I/O-bounded network for massively parallel systems | 1995 |
| A Abnous, N Bagherzadeh | Pipelining and bypassing in a VLIW processor | 1994 |
| S Latifi, N Bagherzadeh | Incomplete star: an incrementally scalable network based on the star graph | 1994 |
| J Lenell, N Bagherzadeh | A performance comparison of several superscalar processor models with a VLIW processor | 1994 |
| A Kavianpour, S Shoari, N Bagherzadeh | A new approach for circle detection on multiprocessors | 1994 |
| S Wallace, N Dagli… | Design and implementation of a 100 MHz reorder buffer | 1994 |
| S Shoari, A Kavianpour, N Bagherzadeh | Pyramid simulation of image processing applications | 1994 |
| MM De Azevedo, S Lati, N Bagherzadeh | On packing and embedding hypercubes into star graphs | 1994 |
| MM De Azevedo, N Bagherzadeh, M Dowd, S Latifi | Average distance and routing algorithms in the star-connected cycles interconnection network | 1994 |
| A Abnous, N Bagherzadeh | VI. CONCLUSION | 1994 |
| A Kavianpour, N Bagherzadeh | Parallel Algorithms for Line Detection on a Pyramid Architecture | 1994 |
| N Bagherzadeh, M Dowd, S Latifi | Faster column operations in star graphs | 1994 |
| N Bagherzadeh, N Nassif, S Latifi | A routing and broadcasting scheme on faulty star graphs | 1993 |
| S Latifi, MM de Azevedo… | The star connected cycles: a fixed-degree network for parallel processing | 1993 |
| J Gray, A Naylor, A Abnous… | Viper: A vliw integer microprocessor | 1993 |
| J Gray, A Naylor, A Abnous… | VIPER: A 25-MHz, 100-MIPS peak VLIW microprocessor | 1993 |
| A Fijany, G Kwan, N Bagherzadeh | A fast algorithm for parallel computation of multibody dynamics on MIMD parallel architectures | 1993 |
| A Kavianpour, N Bagherzadeh | A systematic approach for mapping application tasks in hypercubes | 1993 |
| MM De Azevedo, N Bagherzadeh… | The star-connected cycles: A fixed-degree interconnection network for massively parallel systems | 1993 |
| C Bowen, N Bagherzadeh | Image processing applications in C++ on a hypercube multicomputer | 1993 |
| T Kato, T Ono, N Bagherzadeh | Data cache architecture of the superscalar by scheduling patterns | 1993 |
| S Latifi, SQ Zheng, N Bagherzadeh | Optimal Ring Embedding in Hypercubes with Faulty Links. | 1992 |
| A Abnous, C Christensen, J Gray, J Lenell… | Design and implementation of the 'Tiny RISC'microprocessor | 1992 |
| J Lenell, S Wallace, N Bagherzadeh | A 20 MHz CMOS reorder buffer for a superscalar microprocessor | 1992 |
| A Abnous, N Bagherzadeh | Architectural design and analysis of a VLIW processor | 1992 |
| A Kavianpour, N Bagherzadeh | Finding circular shapes in an image on a pyramid architecture | 1992 |
| T Kato, T Ono, N Bagherzadeh | Performance analysis and design methodology for a scalable superscalar architecture | 1992 |
| N Bagherzadeh, K Hawk | Parallel Implementation of the Auction Algorithm on the Intel Hypercube. | 1992 |
| A Abnous, N Bagherzadeh | Pipelining and Bypassing in a VLIW Processor | 1992 |
| J Lenell, N Bagherzadeh | A performance comparison of several superscalar processsor [sic] models with a VLIW processor | 1992 |
| A Abnous, N Bagherzadeh | Pipelining and bypassing in a VLIW processor(abstract) | 1992 |
| T Kato, K Suginma, N Bagherzadeh, YC Hong… | SESSION 8A: Communications, Synchronization and Data Mapping (R): Comptle Time Parallel Resource Allocation for Unbounded Tree Structure Task … | 1992 |
| T Kato, T Onot, N Bagherzadeh | A Novel Superscalar Architecture with Predetermined Scheduling | 1992 |
| A Abnous, C Christensen, J Gray, J Lenell, A Naylor… | VLSI design of the tiny RISC microprocessor | 1991 |
| N Bagherzadeh, S Heng, C Wu | A parallel asynchronous garbage collection algorithm for distributed systems | 1991 |
| A Abnous, N Bagherzadeh | Special features of a vliw architecture | 1991 |
| A Abnous, R Potasman, N Bagherzadeh, A Nicolau | A Percolation Based VLIW Architecture. | 1991 |
| A Kavianpour, N Bagherzadeh | Parallel Hough Transform for Image Processing on a Pyramid Architecture. | 1991 |
| WK Tsai, N Bagherzadeh, YC Kim | Hypermesh: A Combined Quad Tree and Mesh Network for Parallel Processing. | 1991 |
| DM Blough, N Bagherzadeh | Near-optimal message routing and broadcasting in faulty hypercubes | 1990 |
| DM Blough, N Bagherzadeh | for Hypercube Systems | 1990 |
| Y Moon, N Bagherzadeh, J Sklansky | Macropipelined multicomputer architecture for image analysis | 1989 |
| Y Moon, N Bagherzadeh… | Macropipelined Multicomputer Systems For Image Analysis | 1989 |
| DM Blough, N Bagherzadeh, R Sehgal | A New Fault-Tolerant Routing Algorithm for Hypercube Systems | 1989 |
| A Guzman, EJ Krall, PF McGehearty… | The effect of application characteristics on performance in a parallel architecture | 1988 |
| N Bagherzadeh | DISTRIBUTED RESOURCE MANAGEMENT: GARBAGE COLLECTION. | 1988 |
| N BAGHERZADEH, KEN TSENG… | Erratic non-uniform traffic behavior of a multiple microcomputer network | 1988 |
| A Guzman, EJ Krall, PF McGehearty… | Performance of symbolic applications on a parallel architecture | 1987 |
| A Guzman, E Krall, P McGehearty, N Bagherzadeh | MCC Technical Report Number: PP-163-87 | 1987 |
| B Kandu, S Heng, C Wu, N Bagherzadeh | Network simulation of synchronous garbage collection algorithm | 1987 |
| MCC Non-Confidential, A Guzman, E Krall… | Performance of Symbolic Applications on a Parallel Architecture | 1987 |
| PA Suhler, N Bagherzadeh, M Malek, N Iscoe | Software Authorization Systems. | 1986 |
| C Wu, M Lee, C Sudtikitpisan, J Moaddeb… | Prototype of star architecture-a status report | 1985 |
| M Lee, E Fiene, C Wu, G Brown, N Bagherzadeh | Network Facility for a Reconfigurable Computer Architecture. | 1985 |
| N Bagherzadeh | Quantized and linear detection | 1979 |
| J Lenell, N Bagherzadeh | Superscalar Processor Models with a VLIW | |
| OEK Aktouf, J Alcaraz, P Alonso-Jordá… | 2021 29th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)| 978-1-6654-1455-5/20/$31.00© 2021 IEEE| DOI … | |
| M Alnemari, N Bagherzadeh, S Nedelkoski, L Thamsen | EDGE 2019 | |
| MS RUSLI, OOIC YEE, MN MARSONO, PM YAGHINI… | An Energy Aware Transmission Control in Wireless Network-on-Chip | |
| T Ungerer, ID Fey, M Knebel, N Bagherzadeh… | Report on Disruptive Technologies for years 2020-2030 | |
| A El Abbadi, M Alam, G Alonso, K Asanovi… | Computer Society Connection | |
| N Bagherzadeh, FJ Kurdahi, HK Liu, F Etemadi, GM Lu | Design and Implementation of a 51.84 Mbps, 12.96 MBaud, Digital CAP Transceiver | |
| LA Bathen, N Bagherzadeh | A Fast and Innovative Approach Towards an Automatic Target Recognition System Implementation on a Reconfigurable Architecture | |
| N Bagherzadeh, LN Bhuyan | General Co-Chairs' Message | |
| R Maestre, FJ Kurdahi, M Frenandez, R Hermida… | VLSI TRANSACTIONS BEST PAPER AWARD | |
| N Bagherzadeh | Design and analysis of a programmable single-chip architecture for DVB-T base-band receiver | |
| MM de Azevedo, S Lati, N Bagherzadeh | Space-and Time-E cient Packings and Embeddings of Hypercubes into Star Graphs | |
| J Liu, PH Chou, N Bagherzadeh | Super DVS: Enabling the Next Order Energy Reduction through Algorithm and Architecture Parallelization | |
| J rey Gray, A Naylor, A Abnous, N Bagherzadeh | VIPER: A VLIW Integer Microprocessor | |
| AF De Souza, A Goldman, A Coutinho, A Valli, B Folliot… | SBAC-PAD 2006 | |
| M El Ahmad, M Najem, P Benoit, G Sassatelli, L Torres… | www. aspbs. com/jolpe | |
| JP Oliver, F Veirano, D Bouvier, E Boemo, A Nocua… | www. aspbs. com/jolpe | |
| H Amano, J Anderson, E Anderson, D Andrews… | Milos Drutarovsky, Technical University of Kosice, Slovak Republic Carl Ebeling, University of Washington, USA Yana Ekrasteva, Universidad Politecnica … | |
| HOB JUN, SEUN LEE, YS YANG, Y JUNGSOOK… | ON DESIGN AND APPLICATION MAPPING OF A NETWORK-ON-CHIP (NOC) ARCHITECTURE | |
| JN AMARAL, M ATALLAH, N BAGHERZADEH… | Members-at-Large | |
| AF de Souza, AG vel Lejbman, ALGA Coutinho… | Jack Dongarra, USA (Chair) Jairo Panetta, Brazil Jean-Luc Gaudiot, USA José Fortes, USA José H. Saito, Brazil | |
| S Wallace, N Bagherzadeh | Department of Electrical and Computer Engineering University of California, Irvine Irvine, CA 92717 swallace or nader@ ece. uci. edu | |
| JH Anderson, R Azimi, F Bagci, N Bagherzadeh… | CADS Program Committee | |
| N Bagherzadeh | High Performance Parallel Computing for FDTD Numerical Technique in Electromagnetic Calculations for SAR Distribution Inside Human Head | |
| N Abdhennader, M Aldinucci, JN Amaral, JL Aragón… | Jacobo Lobeiras Blanco Erik Maehle Frédéric Magoules | |
| AAN Bagherzadeh | Pipelining and Bypassing in a VLIW Processor | |
| A Coutinho, A Matsunaga, ATA Gomes, A Mury… | Alan Sussman Alberto de Souza Alfredo Goldman Ali Butt | |
| NB PI, FJ Kurdahi | 155.52 Mbps, 64-CAP, ALL-DIGITAL ATM MODULATOR/DEMODULATOR IN 0.35µm CMOS |
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